FIG. 8 is a diagram of a configuration of a conventional MPEG-2 video decoder. As depicted in FIG. 8, with a conventional MPEG-2 video decoder 1, a video stream input thereto is subjected to variable length decoding by a variable length codec 2, inverse quantization by an inverse quantization unit 3, and inverse discrete cosine transform by an inverse discrete cosine transform unit 4. If the data input is intradata, a switch 5 switches the path to the side of the inverse discrete cosine transform unit 4 and data output from the inverse discrete cosine transform unit 4 is stored as is in a frame buffer 6. On the other hand, if the data is interdata, the switch 5 switches the path to the side of an adder 7 that, based on vector data and reference frame data, adds and stores to the frame buffer 6, data generated from a motion compensation estimate by a motion compensation estimating unit 8 and data output from the inverse discrete cosine transform unit 4. Strictly speaking, configuration of an MPEG-1 or MPEG-4 video decoder differs from this configuration, but is for the most part similar.
FIG. 9 is a diagram of a configuration of a conventional H.264 video decoder. As depicted in FIG. 9, in a conventional H.264 video decoder 11, video stream input thereto is subject to variable length decoding by a variable length codec 12 and, inverse quantization and inversion by an inverse quantization/inverting unit 13. If the data input is intradata, a switch 14 switches the path to the side of an intra estimating unit 15, and an adder 16 adds data generated from an intra estimate by the intra estimating unit 15 and data output from the inverse quantization/inverting unit 13. On the other hand, if the data is interdata, the switch 14 switches the path to the side of the motion compensation estimating unit 17 and based on vector data and reference frame data, the adder 16 adds data generated from a motion compensation estimate by the motion compensation estimating unit 17 and data output from the inverse quantization/inverting unit 13. Data output from the adder 16 is stored to the frame buffer 19 through a deblocking filter 18.
FIG. 10 is a flowchart of a frame decoding process executed by the video decoder depicted in FIG. 8 or FIG. 9. The decoding process depicted in FIG. 10 is a process executed with respect to 1 frame. As depicted in FIG. 10, when the decoding process for a frame begins, it is determined whether stream input is normal or abnormal (step S1). If stream input is normal (step S1: normal), it is determined whether error recovery in is progress (step S2). If error recovery is not in progress (step S2: NO), steps S3 and S4 are executed for each block in a frame until all of the blocks in the frame are finished.
At step S3, it is determined whether stream input is normal or abnormal with respect to the blocks in the frame. If stream input is normal (step S3: normal), the next block is subject to processing. If stream input is abnormal (step S3: abnormal), the corresponding block of the frame previously output is output as is (step S4). When the process has been completed for each of the blocks in the frame, the decoding process for the frame ends and begins for the next frame.
On the other hand, if stream input is abnormal immediately after the decoding process for the frame begins (step S1: abnormal), the previously output frame is output as is (step S5), the decoding process for the frame ends and begins for the next frame.
If stream input is normal immediately after the decoding process for a frame begins, (step S1: normal) and error recover is in progress (step S2: YES), it is determined whether a key frame (I picture, IDR picture in H.264) has been detected (step S6). If a key frame has been detected (step S6: YES), error recovery is completed. In this case, steps S3 and S4 are executed for each block in a frame, the decoding process for the frame ends and begins for the next frame. On the other hand, if a key frame is not detected (step S6: NO), the frame previously output is output as is (step S7), the decoding process for the frame ends and begins for the next frame.
FIG. 11 is a schematic depicting the transitions of images displayed when an error is detected by the conventional video decoder. In FIG. 11, an image 21 is an image of a frame when, in the decoding process above, the result at step S1 is normal, at step S2: NO, and at step S3: normal. An image 22 is an image of a frame when, in the decoding process of the next frame, step S4 is executed when the result at step S3 is normal up to a given block, and at the given block, becomes abnormal. In the image 22, an image 23 occupying an upper portion up to the position of a detected error indicated by an arrow in FIG. 11 is an image from data decoded by the decoding process for the current frame. An image 24 occupying a lower portion from the position of the detected error is an image of the frame previously output. Images 25, 26, and 27 are images that have frozen when the result at step S1 is normal and step S5 is executed.
FIG. 12 is a schematic depicting the transitions of images displayed when an image is input from a key frame during error recovery by the conventional video decoder. In FIG. 12, an image 28 is an image frozen when the result at step S1 is abnormal. An image 29 is an image of a frame when the result at step S1 is normal, at step S2: YES, at step S6: YES, and at step S3: normal. In this way, stream input recovers and by the input of the key frame, the image suddenly moves. An image 30 is an image of frame when the result at step S1 is normal, at step S2: NO, and at step S3: normal.
FIG. 13 is a schematic depicting the transitions of images displayed when an image is input from a source other than a key frame during error recovery by the conventional video decoder. In FIG. 13, an image 31 is an image frozen when the result at step S1 is abnormal. Images 32, 33, and 34 are images frozen when the result at step S1 is normal, at step S2: YES, and at step S6: NO; and step S7 is executed. Thus, even if stream input recovers, the images remain frozen. When the images are frozen, P and B pictures of the stream that has been input are discarded. An image 35 is an image of a frame when, for the next frame, the result at step S1 is normal, at step S2: YES, at step S6: YES, and at step S3: normal. Thus, with stream input in a recovered state, through the input of a key frame, the image suddenly moves.
As described, in a broadcast transreceiver equipped with a conventional video decoder, if the reception state for a digital broadcast becomes poor, the video image suddenly freezes and even if the reception state recovers, the video image does not recover because the video image remains frozen until a key frame is input and decoded. Thus, the period that the video image remains frozen is prolonged and the continuity of the video image diminishes causing the video image to appear unnatural to the viewer.
Thus, a digital broadcast transreceiver has been disclosed that informs the viewer that the state of reception is deteriorating before the video image freezes to prevent the video image from suddenly freezing. The digital broadcast transreceiver has a function of correcting demodulated digital signals for errors and includes a detecting unit that detects the state of broadcast wave reception, and a reception state notifying unit that, before broadcast wave reception deteriorates beyond a range in which the error can be corrected, gives notification that the state of broadcast wave reception is deteriorating. Further, the reception state notifying unit includes a noise generating unit that generates noise and an adding unit that adds the noise to the video image (see, for example, paragraphs [0006] and [0009] of Japanese Laid-Open Patent Publication No. 2002-64759).
Further, a digital broadcast transreceiver has been disclosed that includes a freeze-determining unit which determines, based on the state of digital broadcast reception, the initiation and termination of freeze processing on the video image output, and a display control unit that, when the freeze processing is in progress, displays on a display screen, a freeze-notification screen subject to changes recognizable by the user. The display control unit generates a pseudo-noise screen that is altered such that the user recognizes the changes. In the digital broadcast transreceiver, the freeze-determining unit determines the initiation and terminal of the freeze processing based on the number of transport stream packets having errors (see, for example, paragraphs [0012], [0016], and [0052] to [0054] of Japanese Laid-Open Patent Publication No. 2005-260605).
Further, technology that prevents sudden disruption of a digital broadcast has been proposed. For example, the digital broadcast transreceiver disclosed in Japanese Laid-Open Patent Publication No. 2004-320394 (claim 8), includes an antenna that receives broadcast data that, as a countermeasure to packet loss, is multiplexed by temporally staggering the same content data constituted by packets having appended thereto headers that include index numbers; a demultiplexing unit that demultiplexes the broadcast data into the original content data to generate first content data and second content data; a storage unit that stores the second content data; a determining unit that determines packet loss for the first content data; a selecting unit that, when the determining unit determines that packet loss has occurred, selects from the second content data stored in the storage unit, packets corresponding to the index numbers of the lost packets, and a decoding unit that decodes data for reproduction from the packets selected by the selecting unit.
However, the digital broadcast transreceiver according to Japanese Laid-Open Patent Publication No. 2002-64759 has a problem in that if the input stream is not appended with error correction information, noise cannot be added to the video image. Further, even if the deterioration of the reception state does not exceed a range that the error can be corrected, i.e., is within a correctable range, noise is added to the video image. Moreover, a problem arises in the case of an apparatus that begins decoding from the I picture, there is no need for error correction during error recovery and if the I picture is not input, an image to which noise has not been added freezes.
Further, the digital broadcast transreceiver according to Japanese Laid-Open Patent Publication No. 2005-260605 has a problem in that although freeze processing is executed when there is a bit error in a transport stream packet, video stream is not addressed. Further, the digital broadcast transreceiver according to Japanese Laid-Open Patent Publication No. 2004-320394 has a problem in that the digital broadcast transreceiver cannot inform the user of deterioration in the reception state and further requires preparation of a storage unit to store the second content data.